Abstract: A 10-b self-timed SAR A/D converter is designed in 28-nm FDSOI CMOS to convert at 500 MS/s. It maintains this effective number of bits across an input bandwidth of 2 GHz, because it will be ...
Abstract: This work presents a 14-bit 100 MS/s Pipelined Successive-Approximation-Register (SAR) ADC in a 28nm CMOS process. The proposed calibration technique remedies the offset voltage and ...
OpenMediaVault 8, or OMV8 for shorts, codenamed "Synchrony" has been released, now supporting only 64-bit architectures ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results
Feedback